Field
An embodiment of the present invention relates to a semiconductor memory device.
Description of the Related Art
Recent years, large-scale integration (LSI) elements have been gradually miniaturized along increase in degree of integration of semiconductor memory devices. Not only simply narrowing a line width, but also improving dimensional accuracy and positional accuracy of a circuit pattern is also required for the miniaturization of the LSI element. A resistive RAM (ReRAM) in which a variable resistance element that variably changes a resistance value is used in a memory cell has been proposed as a technique of overcoming such a problem. Further, a ReRAM having a three-dimensional structure in which the variable resistance element is arranged at each intersection between a plurality of stacked word lines extending in parallel with a semiconductor substrate, and a bit line extending vertically to the semiconductor substrate has been proposed in order to achieve further increase in the degree of integration. Further, a technique to control leakage current during an access operation by performing on/off control of the bit line has been also proposed for the ReRAM having the three-dimensional structure.